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2 marksOperational Amplifiers

CAPE Physics Unit 2 · 2007 · Paper 2 · Question 7(c)(iii)a)

The outputs X, Y, and Z from Figure 8 are connected to the summing amplifier circuit in Figure 9, where logic 1 is 5 V and logic 0 is 0 V.

Write an equation expressing the output voltage V_out in terms of the input voltages V_x, V_y, and V_z.

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Other parts of this question

  1. 7(a)(i)Draw up the truth tables for a 2-input NOR gate and a 2-input NAND gate.[2 marks]
  2. 7(a)(ii)Show how a NAND gate can be constructed using only the four NOR gates of a quad-NOR integrated circuit.[2 marks]
  3. 7(a)(iii)In a two-door car, each door switch outputs logic 1 only when properly closed. A warning light must illuminate if either door is not closed. Construct a truth…[3 marks]
  4. 7(b)(i)Draw the logic circuit diagram for an S-R flip-flop and describe how the output can remain unchanged despite changes in the input state.[3 marks]
  5. 7(b)(ii)Copy and complete Table 4 showing the logic states at outputs X, Y, and Z for clock pulses 0 through 4, given all outputs start at zero.[3 marks]
  6. 7(c)(iii)b)Calculate the value of V_out for the binary inputs (Z, Y, X): (i) 001, (ii) 101, and (iii) 110.[3 marks]
  7. 7(c)(iii)c)Briefly explain how this circuit functions as a digital-to-analogue converter (DAC).[2 marks]

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