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3 marksLogic Gates

CAPE Physics Unit 2 · 2008 (T&T) · Paper 2 · Question 5(a)(ii)

Logic gates, combinational logic, and binary arithmetic.

Draw a circuit diagram to show how a NAND gate may be constructed from a number of NOR gates.

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Other parts of this question

  1. 5(a)(i)Draw the truth tables for a NOR gate and a NAND gate.[2 marks]
  2. 5(a)(iii)Redesign the circuit shown in Figure 9 so that it may be constructed using ONLY NOR gates. Reduce the circuit to the MINIMUM chip count.[3 marks]
  3. 5(b)(i)Add the binary numbers 1011 and 101.[1 mark]
  4. 5(b)(ii)Discuss the difference between a half-adder and a full-adder in digital electronics.[2 marks]
  5. 5(b)(iii)Draw a diagram to show how a full adder is constructed from half-adders and give an example to explain its operation.[4 marks]

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