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4 marksLogic Gates

CAPE Physics Unit 2 · 2008 (Rest of Region) · Paper 2 · Question 2(b)(ii)

A logic circuit is shown in Figure 2.

Replace all the components in Figure 2 with NAND gates (Step 1) and minimise the number of gates to fit on a single quad-NAND chip (Step 2).

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Other parts of this question

  1. 2(a)(i)Draw a diagram showing how a NOT gate can be constructed using parts of this chip.[1 mark]
  2. 2(a)(ii)Draw a diagram showing how an AND gate can be constructed using parts of this chip.[1 mark]
  3. 2(a)(iii)Draw a diagram showing how an OR gate can be constructed using parts of this chip.[1 mark]
  4. 2(b)(i)Complete the truth table for the circuit shown in Figure 2 for intermediate points C, D, E, F and output Q.[4 marks]
  5. 2(c)Draw a diagram of a bistable latch constructed from two NAND gates and, using the sequential truth table, explain how it operates as an electronic latch.[4 marks]

More practice: the rest of this paper · more Logic Gates questions · all CAPE Physics Unit 2 past papers