Quelpr
3 marksLogic Gates

CAPE Physics Unit 2 · 2001 · Paper 2 · Question 6(b)(i)

Figure 3 shows four NAND gates interconnected with inputs A and B and intermediate nodes C, D, E, leading to output Y.

Construct the truth table for the circuit shown in Figure 3.

This question uses a figure or table from the paper — you'll see it when you practise.

The mark scheme is shown once you've answered.

Practise this question

Other parts of this question

  1. 6(a)Write down the truth table for the Exclusive-OR (EX-OR) gate.[1 mark]
  2. 6(b)(ii)Describe in words the logic function of the circuit shown in Figure 3.[2 marks]
  3. 6(c)(i)Using the EX-OR gate, draw a circuit of a half-adder showing clearly the inputs A and B and the outputs of the circuit.[2 marks]
  4. 6(c)(ii)Show how the full-adder circuit can be implemented from two half-adder circuits.[3 marks]
  5. 6(d)Show the block diagram and explain the operation for the addition of the two binary numbers 110 and 101 using adders.[9 marks]

More practice: the rest of this paper · more Logic Gates questions · all CAPE Physics Unit 2 past papers